A BIST Implementation Framework for Supporting Field Testability and Configurability in an Automotive SOC

Built-in self-test techniques have been widely researched and adopted for reasons of improvements in test time and test cost, reduction in test resources required for test of large chips with embedded cores, and for field testability. While the adoption of these techniques is becoming prevalent, there continue to be challenges in making BIST solutions comprehensive to meet several design and application constraints. This paper describes the use of BIST implementations for self-test of logic and memories in an automotive SOC, (designed in Texas Instruments (India)), to support field testability. Novel aspects of this solution include (i) programmable coverage for logic, (ii) built-in selfanalysis and self-repair for memories, and (iii) support for various system and application level interfaces for field test. It is shown how conventional BIST techniques must be augmented to provide test solutions in a system context.